B1DCE=0, B1SEBE=0, B1MW=00, B1DPE=0, B1ICE=0, B1IPE=0
Flash Bank 1 Control Register
| B1SEBE | Bank 1 Single Entry Buffer Enable 0 (0): Single entry buffer is disabled. 1 (1): Single entry buffer is enabled. |
| B1IPE | Bank 1 Instruction Prefetch Enable 0 (0): Do not prefetch in response to instruction fetches. 1 (1): Enable prefetches in response to instruction fetches. |
| B1DPE | Bank 1 Data Prefetch Enable 0 (0): Do not prefetch in response to data references. 1 (1): Enable prefetches in response to data references. |
| B1ICE | Bank 1 Instruction Cache Enable 0 (0): Do not cache instruction fetches. 1 (1): Cache instruction fetches. |
| B1DCE | Bank 1 Data Cache Enable 0 (0): Do not cache data references. 1 (1): Cache data references. |
| RESERVED | no description available |
| RESERVED | no description available |
| RESERVED | no description available |
| B1MW | Bank 1 Memory Width 0 (00): 32 bits 1 (01): 64 bits 2 (10): Reserved 3 (11): Reserved |
| RESERVED | no description available |
| B1RWSC | Bank 1 Read Wait State Control |